Assertain: Automated Security Assertion Generation Using Large Language Models
arXiv SecurityArchived Apr 03, 2026✓ Full text saved
arXiv:2604.01583v1 Announce Type: new Abstract: The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property verification. This paper presents Assertain, an automated framework that integrates RTL design analysis, Common Weakness Enumeration (CWE) mapping, and threat model intelligence to automatically generate security properties and executable SystemVerilog Assertions. Asserta
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✦ AI Summary· Claude Sonnet
Computer Science > Cryptography and Security
[Submitted on 2 Apr 2026]
Assertain: Automated Security Assertion Generation Using Large Language Models
Shams Tarek, Dipayan Saha, Khan Thamid Hasan, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
The increasing complexity of modern system-on-chip designs amplifies hardware security risks and makes manual security property specification a major bottleneck in formal property verification. This paper presents Assertain, an automated framework that integrates RTL design analysis, Common Weakness Enumeration (CWE) mapping, and threat model intelligence to automatically generate security properties and executable SystemVerilog Assertions. Assertain leverages large language models with a self-reflection refinement mechanism to ensure both syntactic correctness and semantic consistency. Evaluated on 11 representative hardware designs, Assertain outperforms GPT-5 by 61.22%, 59.49%, and 67.92% in correct assertion generation, unique CWE coverage, and architectural flaw detection, respectively. These results demonstrate that Assertain significantly expands vulnerability coverage, improves assertion quality, and reduces manual effort in hardware security verification.
Comments: This paper will be presented at the 35th Microelectronics Design and Test Symposium (IEEE MDTS 2026)
Subjects: Cryptography and Security (cs.CR)
Cite as: arXiv:2604.01583 [cs.CR]
(or arXiv:2604.01583v1 [cs.CR] for this version)
https://doi.org/10.48550/arXiv.2604.01583
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Submission history
From: Khan Thamid Hasan [view email]
[v1] Thu, 2 Apr 2026 03:51:35 UTC (63 KB)
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