A TEE-Based Architecture for Confidential and Dependable Process Attestation in Authorship Verification

Computer Science > Cryptography and Security [Submitted on 26 Feb 2026 (v1), last revised 24 Apr 2026 (this version, v2)] A TEE-Based Architecture for Confidential and Dependable Process Attestation in Authorship Verification David Condrey Process attestation systems verify that a continuous physical process, such as human authorship, actually occurred, rather than merely checking system state. These systems face a fundamental dependability challenge: the evidence collection infrastructure must remain available and tamper-resistant even when the attesting party controls the platform. Trusted Execution Environments (TEEs) provide hardware-enforced isolation that can address this challenge, but their integration with continuous process attestation introduces novel resilience requirements not addressed by existing frameworks. We present the first architecture for continuous process attestation evidence collection inside TEEs, providing hardware-backed tamper resistance against trust-inverted adversaries with graduated input assurance from software-channel integrity (Tier 1) through hardware-bound input (Tier 3). We develop a Markov-chain dependability model quantifying Evidence Chain Availability (ECA), Mean Time Between Evidence Gaps (MTBEG), and Recovery Time Objectives (RTO). We introduce a resilient evidence chain protocol maintaining chain integrity across TEE crashes, network partitions, and enclave migration. Our security analysis derives formal bounds under combined threat models including trust inversion and TEE side channels, parameterized by a conjectural side-channel leakage bound esc that requires empirical validation. Evaluation on Intel SGX demonstrates under 25% per-checkpoint CPU overhead (<0.3% of the 30 s checkpoint interval), >99.5% Evidence Chain Availability (ECA) (the fraction of session time with active evidence collection) in Monte Carlo simulation under Poisson failure models, and sealed-state recovery under 200 ms. Comments: 13 pages Subjects: Cryptography and Security (cs.CR); Hardware Architecture (cs.AR); Operating Systems (cs.OS) MSC classes: 68M25, 68N25, 68Q87 ACM classes: D.4.6; K.6.5; C.0 Cite as: arXiv:2603.00178 [cs.CR]   (or arXiv:2603.00178v2 [cs.CR] for this version)   https://doi.org/10.48550/arXiv.2603.00178 Focus to learn more Submission history From: David L. Condrey [view email] [v1] Thu, 26 Feb 2026 20:17:52 UTC (20 KB) [v2] Fri, 24 Apr 2026 06:27:53 UTC (19 KB) Access Paper: HTML (experimental) view license Current browse context: cs.CR < prev   |   next > new | recent | 2026-03 Change to browse by: cs cs.AR cs.OS References & Citations NASA ADS Google Scholar Semantic Scholar Export BibTeX Citation Bookmark Bibliographic Tools Bibliographic and Citation Tools Bibliographic Explorer Toggle Bibliographic Explorer (What is the Explorer?) Connected Papers Toggle Connected Papers (What is Connected Papers?) Litmaps Toggle Litmaps (What is Litmaps?) scite.ai Toggle scite Smart Citations (What are Smart Citations?) Code, Data, Media Demos Related Papers About arXivLabs Which authors of this paper are endorsers? | Disable MathJax (What is MathJax?)