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Toward designing workload-aware Surface Code Architectures

arXiv Quantum Archived Apr 23, 2026 ✓ Full text saved

arXiv:2604.19855v1 Announce Type: new Abstract: Practical quantum advantage is expected to depend on fault-tolerant quantum computing, although the architectural overhead needed to support fault tolerance is still extremely high. Prior FTQC designs generally emphasize either fast logical-qubit accessibility at the cost of significant qubit overhead, or high logical-qubit density at the cost of added workload latency. We propose an architecture that balances these competing objectives by placing

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    Quantum Physics [Submitted on 21 Apr 2026] Toward designing workload-aware Surface Code Architectures Archisman Ghosh, Avimita Chatterjee, Swaroop Ghosh Practical quantum advantage is expected to depend on fault-tolerant quantum computing, although the architectural overhead needed to support fault tolerance is still extremely high. Prior FTQC designs generally emphasize either fast logical-qubit accessibility at the cost of significant qubit overhead, or high logical-qubit density at the cost of added workload latency. We propose an architecture that balances these competing objectives by placing surface-code patches around an ancilla-centric region, which yields nearly uniform ancilla access for all data qubits. Building on this design, we introduce a new workload-driven placement method that uses the T-gate profile of an application to determine an effective floorplan. We further provide a reconfigurable optimization for reducing the latency of Y-gate measurements on a per-workload basis. To improve flexibility, we also study concurrent execution of multiple programs on the same architecture. Numerical evaluation indicates that our approach keeps cycles per instruction near the optimal regime while reducing the number of required data tiles by up to \sim21\%, and achieves up to \sim90\% efficiency when running 10 programs concurrently. Comments: 14 pages, 10 figures Subjects: Quantum Physics (quant-ph); Hardware Architecture (cs.AR) Cite as: arXiv:2604.19855 [quant-ph]   (or arXiv:2604.19855v1 [quant-ph] for this version)   https://doi.org/10.48550/arXiv.2604.19855 Focus to learn more Submission history From: Archisman Ghosh [view email] [v1] Tue, 21 Apr 2026 17:06:43 UTC (1,605 KB) Access Paper: HTML (experimental) view license Current browse context: quant-ph < prev   |   next > new | recent | 2026-04 Change to browse by: cs cs.AR References & Citations INSPIRE HEP NASA ADS Google Scholar Semantic Scholar Export BibTeX Citation Bookmark Bibliographic Tools Bibliographic and Citation Tools Bibliographic Explorer Toggle Bibliographic Explorer (What is the Explorer?) Connected Papers Toggle Connected Papers (What is Connected Papers?) Litmaps Toggle Litmaps (What is Litmaps?) scite.ai Toggle scite Smart Citations (What are Smart Citations?) Code, Data, Media Demos Related Papers About arXivLabs Which authors of this paper are endorsers? | Disable MathJax (What is MathJax?)
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    arXiv Quantum
    Category
    ◌ Quantum Computing
    Published
    Apr 23, 2026
    Archived
    Apr 23, 2026
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