CyberIntel ⬡ News
★ Saved ◆ Cyber Reads
← Back ◌ Quantum Computing Apr 22, 2026

Efficient Routing of Quantum LDPC Codes on Programmable 2D Toric Architectures

arXiv Quantum Archived Apr 22, 2026 ✓ Full text saved

arXiv:2604.18714v1 Announce Type: new Abstract: Quantum low-density parity-check codes are promising candidates towards scalable fault-tolerant quantum computation. Among these, bivariate bicycle (BB) codes offer superior encoding rates and large code distance compared to surface codes. However, their requirement on long-range stabilizer measurements poses significant challenges for implementation on realistic hardware with limited connectivity, such as superconducting circuit platforms. In this

Full text archived locally
✦ AI Summary · Claude Sonnet


    Quantum Physics [Submitted on 20 Apr 2026] Efficient Routing of Quantum LDPC Codes on Programmable 2D Toric Architectures Kun Liu, Takahiro Tsunoda, Sophia H. Xue, Evan McKinney, Zeyuan Zhou, Shifan Xu, Robert J. Schoelkopf, Yongshan Ding Quantum low-density parity-check codes are promising candidates towards scalable fault-tolerant quantum computation. Among these, bivariate bicycle (BB) codes offer superior encoding rates and large code distance compared to surface codes. However, their requirement on long-range stabilizer measurements poses significant challenges for implementation on realistic hardware with limited connectivity, such as superconducting circuit platforms. In this work, we introduce a novel hardware-software co-design that leverages a programmable communication network architecture to address these limitations. Our approach utilizes a 2D toric network of oscillators as a flexible communication fabric linking qubits at each site. Such architecture significantly reduces the number of long-range couplers required from O(n) to O(\sqrt{n}). Dual-rail qubits, along with native gates including Swap-Wait-Swap gates and beamsplitter SWAPs, ensure that long-range two-qubit gates can be executed with high fidelity and low latency. To further enhance performance, our qubit layout and routing algorithm utilize symmetries of the codes and enable maximum parallelism for long-range two-qubit gates, maintaining a low syndrome extraction cycle duration and scalability over the code length. We perform circuit-level simulation with realistic noise modeling based on experimental hardware parameters, observing an logical error rate per logical qubit per cycle of 3.06\% for [[18, 4, 4]] BB code, 2.6\times less than the existing experimental result. These findings provide a practical roadmap and identify key technological advancements needed to achieve low-overhead fault-tolerant quantum computing at scale. Subjects: Quantum Physics (quant-ph) Cite as: arXiv:2604.18714 [quant-ph]   (or arXiv:2604.18714v1 [quant-ph] for this version)   https://doi.org/10.48550/arXiv.2604.18714 Focus to learn more Submission history From: Kun Liu [view email] [v1] Mon, 20 Apr 2026 18:14:28 UTC (2,750 KB) Access Paper: HTML (experimental) view license Current browse context: quant-ph < prev   |   next > new | recent | 2026-04 References & Citations INSPIRE HEP NASA ADS Google Scholar Semantic Scholar Export BibTeX Citation Bookmark Bibliographic Tools Bibliographic and Citation Tools Bibliographic Explorer Toggle Bibliographic Explorer (What is the Explorer?) Connected Papers Toggle Connected Papers (What is Connected Papers?) Litmaps Toggle Litmaps (What is Litmaps?) scite.ai Toggle scite Smart Citations (What are Smart Citations?) Code, Data, Media Demos Related Papers About arXivLabs Which authors of this paper are endorsers? | Disable MathJax (What is MathJax?)
    💬 Team Notes
    Article Info
    Source
    arXiv Quantum
    Category
    ◌ Quantum Computing
    Published
    Apr 22, 2026
    Archived
    Apr 22, 2026
    Full Text
    ✓ Saved locally
    Open Original ↗