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Optimal Circuit Synthesis of Linear Codes for Error Detection and Correction

arXiv Security Archived Apr 07, 2026 ✓ Full text saved

arXiv:2604.03608v1 Announce Type: new Abstract: Fault injection attacks deliberately inject faults into a device via physical channels to disturb its regular execution. Adversaries can effectively deduce secrets by analyzing both the normal and faulty outputs, posing serious threats to cryptographic primitives implemented in hardware. An effective countermeasure to such attacks is via redundancy, commonly referred to as concurrent error detection schemes, where Binary linear codes have been used

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    Computer Science > Cryptography and Security [Submitted on 4 Apr 2026] Optimal Circuit Synthesis of Linear Codes for Error Detection and Correction Xi Yang, Taolue Chen, Yuqi Chen, Fu Song, Chundong Wang, Zhilin Wu Fault injection attacks deliberately inject faults into a device via physical channels to disturb its regular execution. Adversaries can effectively deduce secrets by analyzing both the normal and faulty outputs, posing serious threats to cryptographic primitives implemented in hardware. An effective countermeasure to such attacks is via redundancy, commonly referred to as concurrent error detection schemes, where Binary linear codes have been used to defend against fault injection attacks. However, designing an optimal code circuit is often time-consuming, error-prone, and requires substantial expertise. In this paper, we formalize the optimal code circuit synthesis problem (OptiCC) based on two domain-specific minimization objectives on individual inputs and parity size. We then propose a novel algorithm CiSC for solving OptiCC, prioritizing the minimization of individual inputs. Our approach features both correct-by-construction and secure-by-construction. In a nutshell, CiSC gradually reduces individual inputs and parity size by checking, via SMT solving, the existence of feasible Boolean functions for implementing a desired code. We further present an effective technique to lazily generate combinations of inputs to Boolean functions, while quickly identify equivalent ones. We implement our approach in a tool CiSC, and evaluate it on practical benchmarks. Experimental results show our approach can synthesize code circuits that significantly outperform those generated by the latest state-of-the-art techniques. Comments: 24 pages Subjects: Cryptography and Security (cs.CR); Logic in Computer Science (cs.LO); Software Engineering (cs.SE) Cite as: arXiv:2604.03608 [cs.CR]   (or arXiv:2604.03608v1 [cs.CR] for this version)   https://doi.org/10.48550/arXiv.2604.03608 Focus to learn more Submission history From: Fu Song [view email] [v1] Sat, 4 Apr 2026 06:46:43 UTC (139 KB) Access Paper: HTML (experimental) view license Current browse context: cs.CR < prev   |   next > new | recent | 2026-04 Change to browse by: cs cs.LO cs.SE References & Citations NASA ADS Google Scholar Semantic Scholar Export BibTeX Citation Bookmark Bibliographic Tools Bibliographic and Citation Tools Bibliographic Explorer Toggle Bibliographic Explorer (What is the Explorer?) Connected Papers Toggle Connected Papers (What is Connected Papers?) Litmaps Toggle Litmaps (What is Litmaps?) scite.ai Toggle scite Smart Citations (What are Smart Citations?) Code, Data, Media Demos Related Papers About arXivLabs Which authors of this paper are endorsers? | Disable MathJax (What is MathJax?)
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    arXiv Security
    Category
    ◬ AI & Machine Learning
    Published
    Apr 07, 2026
    Archived
    Apr 07, 2026
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